1. Field of the Invention
The present invention relates to a plasma processing apparatus of the capacitive coupling type and a method for using the same, used for performing a plasma process on a target substrate in, e.g., a semiconductor processing system. The term “semiconductor process” used herein includes various kinds of processes which are performed to manufacture a semiconductor device or a structure having wiring layers, electrodes, and the like to be connected to a semiconductor device, on a target substrate, such as a semiconductor wafer or a glass substrate used for an LCD (Liquid Crystal Display) or FPD (Flat Panel Display), by forming semiconductor layers, insulating layers, and conductive layers in predetermined patterns on the target substrate.
2. Description of the Related Art
For example, in manufacturing semiconductor devices, plasma etching processes, which utilize plasma to etch a layer through a resist mask, are often used for forming a predetermined pattern on a predetermined layer disposed on a target substrate or semiconductor wafer. There are various plasma etching apparatuses for performing such plasma etching, but parallel-plate plasma processing apparatuses of the capacitive coupling type are presently in the mainstream.
In general, a parallel-plate plasma etching apparatus of the capacitive coupling type includes a chamber with parallel-plate electrodes (upper and lower electrodes) disposed therein. While a process gas is supplied into the chamber, an RF (radio frequency) is applied to one of the electrodes to form an RF electric field between the electrodes. The process gas is ionized into plasma by the RF electric field, thereby performing a plasma etching process on a semiconductor wafer.
More specifically, there is known a plasma etching apparatus in which an RF power for plasma generation is applied to the upper electrode to generate plasma, while an RF power for ion attraction is applied to the lower electrode. This plasma etching apparatus can form a suitable plasma state and realize an etching process with high selectivity and high reproducibility.
In recent years, miniaturization proceeds in the design rules used for manufacturing processes, and thus plasma processes are required to generate higher density plasma at a lower pressure. Under the circumstances, there is a trend in parallel-plate plasma processing apparatuses of the capacitive coupling type described above, such that the RF power applied to the upper electrode is selected from a range covering higher frequencies (for example, 50 MHz or more) than conventional values (typically, 27 MHz or less) (for example, Jpn. Pat. Appln. KOKAI Publication No. 2000-173993 (Patent Document 1)).
However, if the frequency of the RF power applied to the upper electrode is set higher, when the RF power is supplied from an RF power supply through a feed rod to the electrode backside, it is transmitted through the electrode surface by means of the skin effect and is concentrated at the central portion of the electrode bottom surface (plasma contact surface). Consequently, the electric field intensity at the central portion of the electrode bottom surface becomes higher than the electric field intensity at the peripheral portion, so the density of generated plasma becomes higher at the electrode central portion than at the electrode peripheral portion. This condition brings about a so called center-fast state in the etching process.
In order to solve this problem, a design is known in which the bottom surface central portion of an upper electrode is formed of a high resistivity member (for example, Jpn. Pat. Appln. KOKAI Publication No. 2000-323456 (Patent Document 2)). According to this technique, the high resistivity member is employed for the bottom surface central portion of an upper electrode to consume more RF power as Joule heat there. Consequently, the electric field intensity on the bottom surface (plasma contact surface) of the upper electrode is more reduced at the electrode central portion than at the electrode peripheral portion, so that the poor uniformity described above in plasma density is remedied. However, the structure according to the technique disclosed in Patent Document 2 may consume too much RF power as Joule heat (energy loss).